Alice and Bob Reveal Phase One PROQCIMA Quantum Results

Alice and Bob recently completed the initial phase of the French government PROQCIMA program, showcasing significant milestones in cat-qubit error correction. The company utilized three dedicated hardware demonstrators to validate essential components of its architecture. This development marks a critical step toward achieving fault-tolerant quantum computing on an industrial scale.

National Quantum Strategy and Program Goals

The PROQCIMA initiative represents a major strategic investment by the French government to secure a leading position in the global quantum landscape. Managed by the French Defense Innovation Agency and the Direction Generale de l’Armement, the project focuses on creating two functional prototypes of universal quantum computers. Each prototype must support at least 1,000 logical qubits to meet the program requirements for industrial readiness. The project timeline spans a decade, creating a competitive environment where only the most viable technologies receive long-term funding.

This competition began with five distinct companies, including Alice and Bob, Pasqal, Quandela, Quobly, and C12. Each participant brings a unique technological approach to the challenge of quantum scaling. After the initial four years, the government will narrow the field to three candidates. By the eighth year, only two companies will remain to finalize the development of the high-capacity quantum prototypes. This structure ensures that only the most technically sound and industrially feasible solutions move forward.

Alice and Bob entered the first phase in 2024 with a commitment to build an integrated multi-block demonstrator. The goal was to provide functional validation of their specific error-correction architecture on physical hardware. This phase focused on proving that the theoretical advantages of cat-qubits could translate into practical, reproducible results in a laboratory setting. The recent report confirms that the company met these commitments through the operation of multiple hardware systems.

Hardware Validation and Technical Milestones

The technical results from Phase 1 stem from the operation of two 6-qubit chips and one 12-qubit chip. These demonstrators allowed the engineering team to test the individual building blocks required for a stable logical qubit. One of the most significant achievements involved the demonstration of noise-biased CNOT gates. These gates operate between cat-qubits while maintaining their inherent protection against bit flips. Bit-flip protection is a cornerstone of the Alice and Bob strategy for efficient error correction.

Researchers also successfully implemented a measure-and-reset sequence for auxiliary qubits. This process is vital for reading the qubit state that contains the error syndrome. Once the error is identified, the system re-prepares the qubit for the subsequent quantum error correction cycle. The performance of this sequence aligned with the targets established at the beginning of the PROQCIMA program. Consistency in these cycles is necessary for the long-term stability of any quantum processor.

Additional testing included the execution of multiple cycles of a three-data-qubit repetition code. This represents the smallest possible code capable of correcting a quantum error in a real-time environment. The team also successfully performed a non-Clifford gate on a cat-qubit. This type of gate is a fundamental requirement for universal fault-tolerant computing. It serves as a preliminary step toward the production of magic states, which are necessary for complex quantum algorithms.

Performance Monitoring and Future Optimization

While the hardware tests proved successful in many areas, the measured logical error rate remains above the threshold required for full error correction. To address this, Alice and Bob developed a digital twin of the processor using real performance data. This simulation tool allows engineers to pinpoint exactly where improvements are needed. The digital twin indicates that extending qubit coherence across the entire chip is the primary priority for the next stage of development.

To manage the complexity of these quantum systems, the company utilizes proprietary monitoring and recalibration software. This tool operates continuously, even when the quantum processing unit is idle. It tracks more than 50 different performance indicators for every qubit on the chip. By monitoring these metrics, the software can detect when a qubit begins to drift from its optimal state. This automated approach ensures that the processor remains at a consistent performance level without manual intervention.

Automated recalibration represents a significant shift in how quantum hardware is maintained. Previously, identifying and fixing qubit drifts could take an entire day of operational time. The new software reduces this overhead, allowing for more efficient use of the hardware during research and development. CEO Theau Peronnin noted that these results demonstrate the strength of the cat-qubit approach. He emphasized that mastering these technologies is essential for France to lead in the field of fault-tolerant quantum computing.